Computing
US Government Using Social Networks for Spying
by paul on Oct.21, 2010, under Computing
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The Electronic Frontier Foundation warned this week that US government agencies are actively using social networking sites such as Facebook and Myspace to spy on people. Agencies named include the U.S. Citizenship and Immigration Services (USCIS) and the Department of Homeland Security (DHS). The EFF raised concerns that the breadth of the surveilance program was concerning, altough it did acknowledge that the DHS monitoring of social networks was appropriate, and that they were attempting to apply “Fair Information Practice Principles”. USCIS officers had apparently been instructed to “friend” citizenship petitioners and their beneficiaries on social networks in the hope that these users will (perhaps inadvertently) allow agents to monitor their activities for evidence of suspected fraud, including evidence that their relationships might not live up to the USCIS’ standard of a legitimate marriage. I have no objection to the general concept of law enforcement monitoring my activities in a public space – this is really no different from having police officiers walking down your street, but the ease with which the govementment can automatically monitor every public conversation on social networks is more than a little scary. I can’t wait for the day when Diaspora is mature enough to use, and I can take control back of my data. |
Password Reuse
by paul on Oct.09, 2010, under Computing
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Well, yet again, Randall Munroe hit the nail on the head with this one. Time to go change all my passwords. |
The 48-core SCC processor: the programmer’s view
by paul on Jul.23, 2010, under Computing
The number of cores integrated onto a single die is expected to climb steadily in the foreseeable future. This move to many-core chips is driven by a need to optimize performance per watt. How best to connect these cores and how to program the resulting many-core processor, however, is an open research question. Designs vary from GPUs to cache-coherent shared memory multiprocessors to pure distributed memory chips. The 48-core SCC processor reported in this paper is an intermediate case, sharing traits of message passing and shared memory architectures. The hardware has been described elsewhere. In this paper, we describe the programmer’s view of this chip. In particular we describe RCCE: the native message passing model created for the SCC processor.
Must have been a great sabbatical – just finished this paper for Supercomputing 2010, and it was the least painful paper I’ve ever written.
